Abstract Body

We report on low-power operation of half-flux-quantum (HFQ) circuits, including wiring elements and a D flip-flop (DFF). In these HFQ circuits, we use a 0-0-π SQUID composed of two conventional switching junctions (0-junctions) and one π-shifted non-switching magnetic Josephson junction (π-junction) as a switching element [1]. Because the π-shift assists switching by inducing a spontaneous current, the 0-0-π SQUID shows a small critical current value (nominal critical current Icn) and is easily switched by a weak driving force. This feature allows us to significantly reduce static and dynamic power consumption at junctions and bias-feeding resistors [2]. The I_cn depends on the product of the 0-0-π SQUID loop inductance (L_squid) and the critical current of 0-junctions (I_c0), and lowering the L_squid I_c0product leads to lowered power operation. It is to be noted that 0-0-π SQUIDs with an extremely lowered L_squid I_c0 product can achieve low-power operation near the thermal limit, compromising the increase in error rates. Because some errors are allowed by target applications (e.g., recognition, mining, and synthesis workloads), we can expect a drastic improvement in energy efficiency with HFQ circuits.

The HFQ circuit design is more difficult than SFQ circuit design because i) HFQ circuits are composed of an increased number of circuit elements (junctions, inductors, and resistors), and ii) 0-0-π SQUIDs are likely to switch accidentally due to dynamic interference from neighborhood SQUIDs. In addition, iii) 0-0-π SQUIDs have intrinsic phase shift by π /2 and can generate unintentional currents that narrow circuit parameter margins. For example, a superconductor loop including three 0-0-π SQUIDs sometimes appears in relatively complex HFQ circuits, and a spontaneous current is induced in that superconductor loop to satisfy the quantization condition. We have developed a circuit parameter optimization tool for HFQ circuits [3] and introduced additional non-switching 0-0-π SQUIDs to compensate for superconductor phase shifts. The HFQ DFF in this study was designed with I_cn of 18.7 and 16.9 µA, which were obtained by 0-0-π SQUIDs using 60 and 57-µA 0-junctions, respectively. The obtained critical margin was 32%, sufficiently wide for fabrication.

We fabricated the test circuits by forming Nb/PdNi/Nb π-junctions on the Nb four-layer, 10-kA/cm² device. The typical size of π-junctions was 6.8 µm in diameter. The obtained critical currents of the π-junctions were around 2 mA, which was large enough for π-junctions to act as π-phase shifters. We successfully obtained correct operation at low-speed tests. The measured bias margin of the HFQ DFF test circuit (Figure), including 36 0-0-π SQUIDs, ranged from 0.38–0.50 mA, which corresponded to 1/3 of an SFQ DFF. The I_cn was limited by the Lsquid Ic0 product of 0-0-π SQUIDs achievable in the fabrication process. Currently, we are designing more low-power HFQ circuits based on a hybrid integrated device of 0-junctions and π-junctions.

References

[1] D. Hasegawa et al., IEEE Trans. Appl. Supercond., vol 31, p. 1101504, 2021.
[2] F. Li et al., Supercond. Sci. Technol., vol. 34, p. 025013, 2021.
[3] S. Tanemura et al., IEEE Trans. Appl. Supercond., vol. 33, p. 1701305, 2023.

Acknowledgment

This work was supported by JST CREST under Grant JPMJCR20C5 and JSPS KAKENHI under Grants JP18H05211, JP19H05615, and JP22H01548. The circuits were partly fabricated at Qufab, AIST.